IEEE 2016 - 2017 VLSI PROJECT TILTES

TITLES

Analyzing the Effect of Clock Jitter on Self-Oscillating Sigma Delta Modulators

Hyper graph Based Minimum Arborescence Algorithm for the Optimization and Reoptimization of Multiple Constant Multiplications.

A High-Throughput Energy-Efficient Implementation of Successive Cancellation Decoder for Polar Codes Using Combinational Logic

Adaptive Multibit Crosstalk-Aware Error Control Coding Scheme for On-Chip Communication

A Method to Design Single Error Correction Codes With Fast Decoding for a Subset of Critical Bits

Multiple Constant Multiplication Algorithm for High-Speed and Low-Power Design

CORDIC II: A New Improved CORDIC Algorithm

Low-Power Parallel Chien Search Architecture Using a Two-Step Approach

Efficient Circuit for Parallel Bit Reversal.

High-Speed and Energy-Efficient Carry Skip Adder Operating Under a Wide Range of Supply Voltage Levels

Low-Cost High-Performance VLSI Architecture for Montgomery Modular Multiplication

A High-Performance FIR Filter Architecture for Fixed and Reconfigurable Applications

Efficient Dynamic Virtual Channel Organization and Architecture for NoC Systems

Improving Nested Loop Pipelining on Coarse-Grained Reconfigurable Architectures

One-Cycle Correction of Timing Errors in Pipelines With Standard Clocked Elements

Analytical SPICE-Compatible Model of Schottky-Barrier-Type GNRFETs With Performance Analysis

A New Optimal Algorithm for Energy Saving in Embedded System With Multiple Sleep Modes

A Novel Quantum-Dot Cellular Automata X-bit × 32-bit SRAM

Input-Based Dynamic Reconfiguration of Approximate Arithmetic Units for Video Encoding

Ultralow-Energy Variation-Aware Design: Adder Architecture Study

SRAM-Based Unique Chip Identifier Techniques .

Implementing Minimum-Energy-Point Systems With Adaptive Logic

On Efficient Retiming of Fixed-Point Circuits

Hardware and Energy-Efficient Stochastic LU Decomposition Scheme for MIMO Receivers

Distributed Sensor Network-on-Chip for Performance Optimization of Soft-Error-Tolerant Multiprocessor System-on-Chip

Concept, Design, and Implementation of Reconfigurable CORDIC

A New CDMA Encoding/Decoding Method for on-Chip Communication Network